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Although we are able modify opcode sizes to have smaller programs, it comes at a price:
decoding the instructions is a bit more complicated.
Before decoding opcode field, the CPU must first decode the instruction size.
This extra step hurts the performance.
These are the reasons, along with some others, why most popular RISC architectures avoid variable-sized instructions.
However, x86 uses the variable-length opcodes, since saving memory is such an admirable goal.
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