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The simplified CPU architecture design does provide the capability for expansion.
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The ability to accomplish this exists in the instruction set through undefined/reserved/illegal opcodes.
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Imaginary single-operand instruction encoding:
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The first method is to directly use the undefined opcodes to define new instructions
(this works best when there are undefined bit patterns within an opcode group and new instruction falls into that same group.)
For example, opcode "000 11 mmm" falls into the same group as the NOT instruction.
If you decided to add NEG (negate, take the two's complement) instruction,
using opcode "000 11 mmm" makes a lot of sense.
NEG instruction uses the same syntax and decoding, as the NOT instruction.
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