xv
TABLE OF TABLES
Table 2-1.16-Bit Addressing Forms with the ModR/M Byte . . . . . . . . . . . . . . . . . . . . . . .2-5
Table 2-2.32-Bit Addressing Forms with the ModR/M Byte . . . . . . . . . . . . . . . . . . . . . . .2-6
Table 2-3.32-Bit Addressing Forms with the SIB Byte . . . . . . . . . . . . . . . . . . . . . . . . . . .2-7
Table 3-1.Register Encodings Associated with the +rb, +rw, and +rd Nomenclature. . . .3-3
Table 3-2.Exception Mnemonics, Names, and Vector Numbers . . . . . . . . . . . . . . . . . .3-13
Table 3-3.Floating-Point Exception Mnemonics and Names . . . . . . . . . . . . . . . . . . . . .3-14
Table 3-4.SIMD Floating-Point Exception Mnemonics and Names . . . . . . . . . . . . . . . .3-15
Table 3-5.Streaming SIMD Extensions Faults (Interrupts 6 & 7) . . . . . . . . . . . . . . . . . .3-16
Table 3-6.Information Returned by CPUID Instruction. . . . . . . . . . . . . . . . . . . . . . . . .3-111
Table 3-7.Processor Type Field . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-113
Table 3-8.Feature Flags Returned in EDX Register. . . . . . . . . . . . . . . . . . . . . . . . . . .3-114
Table 3-9.Encoding of Cache and TLB Descriptors . . . . . . . . . . . . . . . . . . . . . . . . . . .3-116
Table A-1.Notes on Instruction Set Encoding Tables . . . . . . . . . . . . . . . . . . . . . . . . . . . A-5
Table A-2.One-byte Opcode Map (Left) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-6
Table A-3.One-byte Opcode Map (Right) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-7
Table A-4.Two-byte Opcode Map (Left) (First Byte is OFH). . . . . . . . . . . . . . . . . . . . . . A-8
Table A-5.Two-byte Opcode Map (Right) (First Byte is OFH). . . . . . . . . . . . . . . . . . . . . A-9
Table A-6.Opcode Extensions for One- and Two-byte Opcodes by Group Number. . . A-11
Table A-7.D8 Opcode Map When ModR/M Byte is Within 00H to BFH1 . . . . . . . . . . . A-12
Table A-8.D8 Opcode Map When ModR/M Byte is Outside 00H to BFH1 . . . . . . . . . . A-13
Table A-9.D9 Opcode Map When ModR/M Byte is Within 00H to BFH1.. . . . . . . . . . . A-14
Table A-10.D9 Opcode Map When ModR/M Byte is Outside 00H to BFH1 . . . . . . . . . . A-15
Table A-11.DA Opcode Map When ModR/M Byte is Within 00H to BFH1 . . . . . . . . . . . A-15
Table A-12.DA Opcode Map When ModR/M Byte is Outside 00H to BFH1. . . . . . . . . . A-16
Table A-13.DB Opcode Map When ModR/M Byte is Within 00H to BFH1 . . . . . . . . . . . A-17
Table A-14.DB Opcode Map When ModR/M Byte is Outside 00H to BFH1. . . . . . . . . . A-17
Table A-15.DC Opcode Map When ModR/M Byte is Within 00H to BFH1. . . . . . . . . . . A-18
Table A-16.DC Opcode Map When ModR/M Byte is Outside 00H to BFH4. . . . . . . . . . A-19
Table A-17.DD Opcode Map When ModR/M Byte is Within 00H to BFH1. . . . . . . . . . . A-20
Table A-18.DD Opcode Map When ModR/M Byte is Outside 00H to BFH1. . . . . . . . . . A-20
Table A-19.DE Opcode Map When ModR/M Byte is Within 00H to BFH1 . . . . . . . . . . . A-21
Table A-20.DE Opcode Map When ModR/M Byte is Outside 00H to BFH1. . . . . . . . . . A-22
Table A-21.DF Opcode Map When ModR/M Byte is Within 00H to BFH1 . . . . . . . . . . . A-23
Table A-22.DF Opcode Map When ModR/M Byte is Outside 00H to BFH1. . . . . . . . . . A-23
Table B-1.Special Fields Within Instruction Encodings. . . . . . . . . . . . . . . . . . . . . . . . . . B-2
Table B-2.Encoding of reg Field When w Field is Not Present in Instruction . . . . . . . . . B-2
Table B-3.Encoding of reg Field When w Field is Present in Instruction. . . . . . . . . . . . . B-3
Table B-4.Encoding of Operand Size (w) Bit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . B-3
Table B-5.Encoding of Sign-Extend (s) Bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . B-3
Table B-6.Encoding of the Segment Register (sreg) Field . . . . . . . . . . . . . . . . . . . . . . . B-4
Table B-7.Encoding of Special-Purpose Register (eee) Field. . . . . . . . . . . . . . . . . . . . . B-4
Table B-8.Encoding of Conditional Test (tttn) Field. . . . . . . . . . . . . . . . . . . . . . . . . . . . . B-5
Table B-9.Encoding of Operation Direction (d) Bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . B-6
Table B-10.Integer Instruction Formats and Encodings . . . . . . . . . . . . . . . . . . . . . . . . . . B-6
Table B-11.Encoding of Granularity of Data Field (gg). . . . . . . . . . . . . . . . . . . . . . . . . . B-19
Table B-12.Encoding of the MMX Register Field (mmxreg) . . . . . . . . . . . . . . . . . . . . B-19
Table B-13.Encoding of the General-Purpose Register Field (reg)
When Used in MMX Instructions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . B-20
Table B-14.MMX Instruction Formats and Encodings. . . . . . . . . . . . . . . . . . . . . . . . . B-21
