1-1
CHAPTER 1
ABOUT THIS MANUAL
The Intel Architecture Software Developers Manual, Volume 2: Instruction Set Reference
(Order Number 243191) is part of a three-volume set that describes the architecture and
programming environment of all Intel Architecture processors. The other two volumes in this
set are:
The Intel Architecture Software Developers Manual, Volume 1: Basic Architecture (Order
Number 243190).
The Intel Architecture Software Developers Manual, Volume 3: System Programing Guide
(Order Number 243192).
The Intel Architecture Software Developers Manual, Volume 1, describes the basic architecture
and programming environment of an Intel Architecture processor; the Intel Architecture Soft-
ware Developers Manual, Volume 2, describes the instructions set of the processor and the
opcode structure. These two volumes are aimed at application programmers who are writing
programs to run under existing operating systems or executives. The Intel Architecture Software
Developers Manual, Volume 3, describes the operating-system support environment of an Intel
Architecture processor, including memory management, protection, task management, interrupt
and exception handling, and system management mode. It also provides Intel Architecture
processor compatibility information. This volume is aimed at operating-system and BIOS
designers and programmers.
1.1.OVERVIEW OF THE INTEL ARCHITECTURE SOFTWARE
DEVELOPERS MANUAL, VOLUME 2: INSTRUCTION SET
REFERENCE
The contents of this manual are as follows:
Chapter 1 About This Manual. Gives an overview of all three volumes of the Intel Archi-
tecture Software Developers Manual. It also describes the notational conventions in these
manuals and lists related Intel manuals and documentation of interest to programmers and hard-
ware designers.
Chapter 2 Instruction Format. Describes the machine-level instruction format used for all
Intel Architecture instructions and gives the allowable encodings of prefixes, the operand-iden-
tifier byte (ModR/M byte), the addressing-mode specifier byte (SIB byte), and the displacement
and immediate bytes.
Chapter 3 Instruction Set Reference. Describes each of the Intel Architecture instructions
in detail, including an algorithmic description of operations, the effect on flags, the effect of
operand- and address-size attributes, and the exceptions that may be generated. The instructions
