3-4
INSTRUCTION SET REFERENCE
imm32An immediate doubleword value used for instructions whose operand-
size attribute is 32 bits. It allows the use of a number between +2,147,483,647 and
2,147,483,648 inclusive.
r/m8A byte operand that is either the contents of a byte general-purpose register (AL,
BL, CL, DL, AH, BH, CH, and DH), or a byte from memory.
r/m16A word general-purpose register or memory operand used for instructions whose
operand-size attribute is 16 bits. The word general-purpose registers are: AX, BX, CX,
DX, SP, BP, SI, and DI. The contents of memory are found at the address provided by the
effective address computation.
r/m32A doubleword general-purpose register or memory operand used for instructions
whose operand-size attribute is 32 bits. The doubleword general-purpose registers are:
EAX, EBX, ECX, EDX, ESP, EBP, ESI, and EDI. The contents of memory are found at the
address provided by the effective address computation.
mA 16- or 32-bit operand in memory.
m8A byte operand in memory, usually expressed as a variable or array name, but
pointed to by the DS:(E)SI or ES:(E)DI registers. This nomenclature is used only with the
string instructions and the XLAT instruction.
m16A word operand in memory, usually expressed as a variable or array name, but
pointed to by the DS:(E)SI or ES:(E)DI registers. This nomenclature is used only with the
string instructions.
m32A doubleword operand in memory, usually expressed as a variable or array name,
but pointed to by the DS:(E)SI or ES:(E)DI registers. This nomenclature is used only with
the string instructions.
m64A memory quadword operand in memory. This nomenclature is used only with the
CMPXCHG8B instruction.
m128A memory double quadword operand in memory. This nomenclature is used only
with the Streaming SIMD Extensions.
m16:16, m16:32A memory operand containing a far pointer composed of two numbers.
The number to the left of the colon corresponds to the pointer's segment selector. The
number to the right corresponds to its offset.
m16&32, m16&16, m32&32A memory operand consisting of data item pairs whose
sizes are indicated on the left and the right side of the ampersand. All memory addressing
modes are allowed. The m16&16 and m32&32 operands are used by the BOUND
instruction to provide an operand containing an upper and lower bounds for array indices.
The m16&32 operand is used by LIDT and LGDT to provide a word with which to load
the limit field, and a doubleword with which to load the base field of the corresponding
GDTR and IDTR registers.
moffs8, moffs16, moffs32A simple memory variable (memory offset) of type byte,
word, or doubleword used by some variants of the MOV instruction. The actual address is
given by a simple offset relative to the segment base. No ModR/M byte is used in the