3-44
INSTRUCTION SET REFERENCE
BSWAPByte Swap
Description
This instruction reverses the byte order of a 32-bit (destination) register: bits 0 through 7 are
swapped with bits 24 through 31, and bits 8 through 15 are swapped with bits 16 through 23.
This instruction is provided for converting little-endian values to big-endian format and vice
versa.
To swap bytes in a word value (16-bit register), use the XCHG instruction. When the BSWAP
instruction references a 16-bit register, the result is undefined.
Intel Architecture Compatibility
The BSWAP instruction is not supported on Intel Architecture processors earlier than the
Intel486 processor family. For compatibility with this instruction, include functionally
equivalent code for execution on Intel processors earlier than the Intel486 processor family.
Operation
TEMP
<
DEST
DEST(7..0)
<
TEMP(31..24)
DEST(15..8)
<
TEMP(23..16)
DEST(23..16)
<
TEMP(15..8)
DEST(31..24)
<
TEMP(7..0)
Flags Affected
None.
Exceptions (All Operating Modes)
None.
Opcode
Instruction
Description
0F C8+rd
BSWAP r32
Reverses the byte order of a 32-bit register.
