3-47
INSTRUCTION SET REFERENCE
BTCBit Test and Complement
Description
This instruction selects the bit in a bit string (specified with the first operand, called the bit base)
at the bit-position designated by the bit offset operand (second operand), stores the value of the
bit in the CF flag, and complements the selected bit in the bit string. The bit base operand can
be a register or a memory location; the bit offset operand can be a register or an immediate value.
If the bit base operand specifies a register, the instruction takes the modulo 16 or 32 (depending
on the register size) of the bit offset operand, allowing any bit position to be selected in a 16- or
32-bit register, respectively (refer to Figure 3-1). If the bit base operand specifies a memory
location, it represents the address of the byte in memory that contains the bit base (bit 0 of the
specified byte) of the bit string (refer to Figure 3-2). The offset operand then selects a bit position
within the range
?
2
31
to 2
31
?
1 for a register offset and 0 to 31 for an immediate offset.
Some assemblers support immediate bit offsets larger than 31 by using the immediate bit offset
field in combination with the displacement field of the memory operand. Refer to BTBit
Test in this chapter for more information on this addressing mechanism.
Operation
CF
<
Bit(BitBase, BitOffset)
Bit(BitBase, BitOffset)
<
NOT Bit(BitBase, BitOffset);
Flags Affected
The CF flag contains the value of the selected bit before it is complemented. The OF, SF, ZF,
AF, and PF flags are undefined.
Opcode
Instruction
Description
0F BB
BTC r/m16,r16
Store selected bit in CF flag and complement
0F BB
BTC r/m32,r32
Store selected bit in CF flag and complement
0F BA /7 ibBTC r/m16,imm8
Store selected bit in CF flag and complement
0F BA /7 ibBTC r/m32,imm8
Store selected bit in CF flag and complement
