3-141
INSTRUCTION SET REFERENCE
CWD/CDQConvert Word to Doubleword/Convert Doubleword
to Quadword
Description
These instructions double the size of the operand in register AX or EAX (depending on the
operand size) by means of sign extension and stores the result in registers DX:AX or EDX:EAX,
respectively. The CWD instruction copies the sign (bit 15) of the value in the AX register into
every bit position in the DX register. For more information, refer to Figure 6-5 in Chapter 6,
Instruction Set Summaryof the Intel Architecture Software Developers Manual, Volume 1. The
CDQ instruction copies the sign (bit 31) of the value in the EAX register into every bit position
in the EDX register.
The CWD instruction can be used to produce a doubleword dividend from a word before a word
division, and the CDQ instruction can be used to produce a quadword dividend from a double-
word before doubleword division.
The CWD and CDQ mnemonics reference the same opcode. The CWD instruction is intended
for use when the operand-size attribute is 16 and the CDQ instruction for when the operand-size
attribute is 32. Some assemblers may force the operand size to 16 when CWD is used and to 32
when CDQ is used. Others may treat these mnemonics as synonyms (CWD/CDQ) and use the
current setting of the operand-size attribute to determine the size of values to be converted,
regardless of the mnemonic used.
Operation
IF OperandSize = 16 (* CWD instruction *)
THEN DX
<
SignExtend(AX);
ELSE (* OperandSize = 32, CDQ instruction *)
EDX
<
SignExtend(EAX);
FI;
Flags Affected
None.
Exceptions (All Operating Modes)
None.
Opcode
Instruction
Description
99
CWD
DX:AX
<
sign-extend of AX
99
CDQ
EDX:EAX
<
sign-extend of EAX
