3-210
INSTRUCTION SET REFERENCE
FLD1/FLDL2T/FLDL2E/FLDPI/FLDLG2/FLDLN2/FLDZLoad
Constant
Description
These instructions push one of seven commonly used constants (in extended-real format) onto
the FPU register stack. The constants that can be loaded with these instructions include +1.0,
+0.0, log
2
10, log
2
e,
?
, log
10
2, and log
e
2. For each constant, an internal 66-bit constant is rounded
(as specified by the RC field in the FPU control word) to external-real format. The inexact result
exception (#P) is not generated as a result of the rounding. Refer to Section 7.5.8., Pi in Chapter
7, Floating-Point Unit of the Intel Architecture Software Developers Manual, Volume 1, for a
description of the
?
constant.
Operation
TOP
<
TOP
?
1;
ST(0)
<
CONSTANT;
FPU Flags Affected
C1
Set to 1 if stack overflow occurred; otherwise, cleared to 0.
C0, C2, C3
Undefined.
Floating-Point Exceptions
#IS
Stack overflow occurred.
Protected Mode Exceptions
#NM
EM or TS in CR0 is set.
Real-Address Mode Exceptions
#NM
EM or TS in CR0 is set.
Opcode
Instruction
Description
D9 E8
FLD1
Push +1.0 onto the FPU register stack.
D9 E9
FLDL2T
Push log
2
10 onto the FPU register stack.
D9 EA
FLDL2E
Push log
2
e onto the FPU register stack.
D9 EB
FLDPI
Push
?
onto the FPU register stack.
D9 EC
FLDLG2
Push log
10
2 onto the FPU register stack.
D9 ED
FLDLN2
Push log
e
2 onto the FPU register stack.
D9 EE
FLDZ
Push +0.0 onto the FPU register stack.
