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INSTRUCTION SET REFERENCE
FLDCWLoad Control Word
Description
This instruction loads the 16-bit source operand into the FPU control word. The source operand
is a memory location. This instruction is typically used to establish or change the FPUs mode
of operation.
If one or more exception flags are set in the FPU status word prior to loading a new FPU control
word and the new control word unmasks one or more of those exceptions, a floating-point
exception will be generated upon execution of the next floating-point instruction (except for the
no-wait floating-point instructions. For more information, refer to Section 7.7.3., Software
Exception Handling in Chapter 7, Floating-Point Unit of the Intel Architecture Software Devel-
opers Manual, Volume 1). To avoid raising exceptions when changing FPU operating modes,
clear any pending exceptions (using the FCLEX or FNCLEX instruction) before loading the
new control word.
Intel Architecture Compatibility
On a Pentium
®
III processor, the FLDCW instruction operates the same as on a Pentium
®
II
processor. It has no effect on the Pentium
®
III processor SIMD floating-point functional unit or
control/status register.
Operation
FPUControlWord
<
SRC;
FPU Flags Affected
C0, C1, C2, C3 undefined.
Floating-Point Exceptions
None; however, this operation might unmask a pending exception in the FPU status word. That
exception is then generated upon execution of the next waiting floating-point instruction.
Opcode
Instruction
Description
D9 /5
FLDCW m2byte
Load FPU control word from m2byte.
