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INSTRUCTION SET REFERENCE
FRSTORRestore FPU State (Continued)
FPU Flags Affected
The C0, C1, C2, C3 flags are loaded.
Floating-Point Exceptions
None; however, this operation might unmask an existing exception that has been detected but
not generated, because it was masked. Here, the exception is generated at the completion of the
instruction.
Protected Mode Exceptions
#GP(0)
If a memory operand effective address is outside the CS, DS, ES, FS, or
GS segment limit.
If the DS, ES, FS, or GS register is used to access memory and it contains
a null segment selector.
#SS(0)
If a memory operand effective address is outside the SS segment limit.
#NM
EM or TS in CR0 is set.
#PF(fault-code)If a page fault occurs.
#AC(0)
If alignment checking is enabled and an unaligned memory reference is
made while the current privilege level is 3.
Real-Address Mode Exceptions
#GP
If a memory operand effective address is outside the CS, DS, ES, FS, or
GS segment limit.
#SS
If a memory operand effective address is outside the SS segment limit.
#NM
EM or TS in CR0 is set.
