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INSTRUCTION SET REFERENCE
FSUB/FSUBP/FISUB—Subtract
Description
These instructions subtract the source operand from the destination operand and stores the
difference in the destination location. The destination operand is always an FPU data register;
the source operand can be a register or a memory location. Source operands in memory can be
in single-real, double-real, word-integer, or short-integer formats.
The no-operand version of the instruction subtracts the contents of the ST(0) register from the
ST(1) register and stores the result in ST(1). The one-operand version subtracts the contents of
a memory location (either a real or an integer value) from the contents of the ST(0) register and
stores the result in ST(0). The two-operand version, subtracts the contents of the ST(0) register
from the ST(i) register or vice versa.
The FSUBP instructions perform the additional operation of popping the FPU register stack
following the subtraction. To pop the register stack, the processor marks the ST(0) register as
empty and increments the stack pointer (TOP) by 1. The no-operand version of the floating-
point subtract instructions always results in the register stack being popped. In some assemblers,
the mnemonic for this instruction is FSUB rather than FSUBP.
The FISUB instructions convert an integer source operand to extended-real format before
performing the subtraction.
The following table shows the results obtained when subtracting various classes of numbers
from one another, assuming that neither overflow nor underflow occurs. Here, the SRC value is
subtracted from the DEST value (DEST
?
SRC = result).
When the difference between two operands of like sign is 0, the result is +0, except for the round
toward
??
mode, in which case the result is
?
0. This instruction also guarantees that +0
?
(
?
0)
= +0, and that
?
0
?
(+0) =
?
0. When the source operand is an integer 0, it is treated as a +0.
When one operand is
?
, the result is
?
of the expected sign. If both operands are
?
of the same
sign, an invalid operation exception is generated.
Opcode
Instruction
Description
D8 /4
FSUB m32real
Subtract m32real from ST(0) and store result in ST(0)
DC /4
FSUB m64real
Subtract m64real from ST(0) and store result in ST(0)
D8 E0+i
FSUB ST(0), ST(i)Subtract ST(i) from ST(0) and store result in ST(0)
DC E8+i
FSUB ST(i), ST(0)Subtract ST(0) from ST(i) and store result in ST(i)
DE E8+i
FSUBP ST(i), ST(0)Subtract ST(0) from ST(i), store result in ST(i), and pop
register stack
DE E9
FSUBP
Subtract ST(0) from ST(1), store result in ST(1), and pop
register stack
DA /4
FISUB m32int
Subtract m32int from ST(0) and store result in ST(0)
DE /4
FISUB m16int
Subtract m16int from ST(0) and store result in ST(0)
