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INSTRUCTION SET REFERENCE
FSUBR/FSUBRP/FISUBRReverse Subtract
Description
These instructions subtract the destination operand from the source operand and stores the
difference in the destination location. The destination operand is always an FPU register; the
source operand can be a register or a memory location. Source operands in memory can be in
single-real, double-real, word-integer, or short-integer formats.
These instructions perform the reverse operations of the FSUB, FSUBP, and FISUB instruc-
tions. They are provided to support more efficient coding.
The no-operand version of the instruction subtracts the contents of the ST(1) register from the
ST(0) register and stores the result in ST(1). The one-operand version subtracts the contents of
the ST(0) register from the contents of a memory location (either a real or an integer value) and
stores the result in ST(0). The two-operand version, subtracts the contents of the ST(i) register
from the ST(0) register or vice versa.
The FSUBRP instructions perform the additional operation of popping the FPU register stack
following the subtraction. To pop the register stack, the processor marks the ST(0) register as
empty and increments the stack pointer (TOP) by 1. The no-operand version of the floating-
point reverse subtract instructions always results in the register stack being popped. In some
assemblers, the mnemonic for this instruction is FSUBR rather than FSUBRP.
The FISUBR instructions convert an integer source operand to extended-real format before
performing the subtraction.
The following table shows the results obtained when subtracting various classes of numbers
from one another, assuming that neither overflow nor underflow occurs. Here, the DEST value
is subtracted from the SRC value (SRC
?
DEST = result).
When the difference between two operands of like sign is 0, the result is +0, except for the round
toward
??
mode, in which case the result is
?
0. This instruction also guarantees that +0
?
(
?
0)
= +0, and that
?
0
?
(+0) =
?
0. When the source operand is an integer 0, it is treated as a +0.
When one operand is
?
, the result is
?
of the expected sign. If both operands are
?
of the same
sign, an invalid operation exception is generated.
Opcode
Instruction
Description
D8 /5
FSUBR m32real
Subtract ST(0) from m32real and store result in ST(0)
DC /5
FSUBR m64real
Subtract ST(0) from m64real and store result in ST(0)
D8 E8+i
FSUBR ST(0), ST(i)Subtract ST(0) from ST(i) and store result in ST(0)
DC E0+i
FSUBR ST(i), ST(0)Subtract ST(i) from ST(0)
and store result in ST(i)
DE E0+i
FSUBRP ST(i), ST(0)Subtract ST(i) from ST(0), store result in ST(i), and pop
register stack
DE E1
FSUBRP
Subtract ST(1) from ST(0), store result in ST(1), and pop
register stack
DA /5
FISUBR m32int
Subtract ST(0) from m32int and store result in ST(0)
DE /5
FISUBR m16int
Subtract ST(0) from m16int and store result in ST(0)
