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INSTRUCTION SET REFERENCE
FXSAVEStore FP and MMX
State and Streaming SIMD
Extension State
Description
The FXSAVE instruction writes the current FP and MMX technology state,
and Streaming
SIMD Extension state (environment and registers), to the specified destination defined by
m512byte. It does this without checking for pending unmasked floating-point exceptions
(similar to the operation of FNSAVE). Unlike the FSAVE/FNSAVE instructions, the processor
retains the contents of the FP and MMX technology state and Streaming SIMD Extension
state in the processor after the state has been saved. This instruction has been optimized to maxi-
mize floating-point save performance. The save data structure is as follows (little-endian byte
order as arranged in memory, with byte offset into row described by right column):
OpcodeInstructionDescription
0F,AE,/0FXSAVE
m512byte
Store FP and MMX technology state and Streaming SIMD
Extension state to m512byte.
