pg_0412

Index

3-372

INSTRUCTION SET REFERENCE

LOOP/LOOPccLoop According to ECX Counter

Description

These instructions perform a loop operation using the ECX or CX register as a counter. Each

time the LOOP instruction is executed, the count register is decremented, then checked for 0. If

the count is 0, the loop is terminated and program execution continues with the instruction

following the LOOP instruction. If the count is not zero, a near jump is performed to the desti-

nation (target) operand, which is presumably the instruction at the beginning of the loop. If the

address-size attribute is 32 bits, the ECX register is used as the count register; otherwise the CX

The target instruction is specified with a relative offset (a signed offset relative to the current

value of the instruction pointer in the EIP register). This offset is generally specified as a label

in assembly code, but at the machine code level, it is encoded as a signed, 8-bit immediate value,

which is added to the instruction pointer. Offsets of 128 to +127 are allowed with this

instruction.

Some forms of the loop instruction (LOOPcc) also accept the ZF flag as a condition for termi-

nating the loop before the count reaches zero. With these forms of the instruction, a condition

code (cc) is associated with each instruction to indicate the condition being tested for. Here, the

LOOPcc instruction itself does not affect the state of the ZF flag; the ZF flag is changed by other

instructions in the loop.

Opcode

Instruction

Description

E2 cb

LOOP rel8