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INSTRUCTION SET REFERENCE
PREFETCH—Prefetch (Continued)
Intel C/C++ Compiler Intrinsic Equivalent
void_mm_prefetch(char *p, int i)
Loads one cache line of data from address p to a location "closer" to the processor. The value i
specifies the type of prefetch operation. The value i specifies the type of prefetch operation: the
constants _MM_HINT_T0, _MM_HINT_T1, _MM_HINT_T2, and _MM_HINT_NTA should
be used, corresponding to the type of prefetch instruction.
Numeric Exceptions
None.
Protected Mode Exceptions
None.
Real Address Mode Exceptions
None.
Virtual 8086 Mode Exceptions
None.
Comments
This instruction is merely a hint. If executed, this instruction moves data closer to the processor
in anticipation of future use. The performance of these instructions in application code can be
implementation specific. To achieve maximum speedup, code tuning might be necessary for
each implementation. The non temporal hint also minimizes pollution of useful cache data.
PREFETCH instructions ignore the value of CR4.OSFXSR. Since they do not affect the new
Streaming SIMD Extension state, they will not generate an invalid exception if CR4.OSFXSR
= 0.
If the PTE is not in the TLB, the prefetch is ignored. This behavior is specific to the Pentium III
processor and may change with future processor implementations.
