3-621
INSTRUCTION SET REFERENCE
SAHFStore AH into Flags
Description
This instruction loads the SF, ZF, AF, PF, and CF flags of the EFLAGS register with values from
the corresponding bits in the AH register (bits 7, 6, 4, 2, and 0, respectively). Bits 1, 3, and 5 of
register AH are ignored; the corresponding reserved bits (1, 3, and 5) in the EFLAGS register
remain as shown in the Operation section below.
Operation
EFLAGS(SF:ZF:0:AF:0:PF:1:CF)
<
AH;
Flags Affected
The SF, ZF, AF, PF, and CF flags are loaded with values from the AH register. Bits 1, 3, and 5
of the EFLAGS register are unaffected, with the values remaining 1, 0, and 0, respectively.
Exceptions (All Operating Modes)
None.
Opcode
Instruction
Clocks
Description
9E
SAHF
2
Loads SF, ZF, AF, PF, and CF from AH into
EFLAGS register
