3-640
INSTRUCTION SET REFERENCE
SHLDDouble Precision Shift Left
Description
This instruction shifts the first operand (destination operand) to the left the number of bits spec-
ified by the third operand (count operand). The second operand (source operand) provides bits
to shift in from the right (starting with bit 0 of the destination operand). The destination operand
can be a register or a memory location; the source operand is a register. The count operand is an
unsigned integer that can be an immediate byte or the contents of the CL register. Only bits 0
through 4 of the count are used, which masks the count to a value between 0 and 31. If the count
is greater than the operand size, the result in the destination operand is undefined.
If the count is one or greater, the CF flag is filled with the last bit shifted out of the destination
operand. For a 1-bit shift, the OF flag is set if a sign change occurred; otherwise, it is cleared. If
the count operand is 0, the flags are not affected.
The SHLD instruction is useful for multiprecision shifts of 64 bits or more.
Opcode
Instruction
Description
0F A4
SHLD r/m16,r16,imm8Shift r/m16 to left imm8 places while shifting bits from r16
in from the right
0F A5
SHLD r/m16,r16,CLShift r/m16 to left CL places while shifting bits from r16 in
from the right
0F A4
SHLD r/m32,r32,imm8Shift r/m32 to left imm8 places while shifting bits from r32
in from the right
0F A5
SHLD r/m32,r32,CLShift r/m32 to left CL places while shifting bits from r32 in
from the right
