3-654
INSTRUCTION SET REFERENCE
SMSWStore Machine Status Word
Description
This instruction stores the machine status word (bits 0 through 15 of control register CR0) into
the destination operand. The destination operand can be a 16-bit general-purpose register or a
memory location.
When the destination operand is a 32-bit register, the low-order 16 bits of register CR0 are
copied into the low-order 16 bits of the register and the upper 16 bits of the register are unde-
fined. When the destination operand is a memory location, the low-order 16 bits of register CR0
are written to memory as a 16-bit quantity, regardless of the operand size.
The SMSW instruction is only useful in operating-system software; however, it is not a privi-
leged instruction and can be used in application programs.
This instruction is provided for compatibility with the Intel 286 processor. Programs and proce-
dures intended to run on the Pentium
®
Pro, Pentium
®
, Intel486, and Intel386 processors
should use the MOV (control registers) instruction to load the machine status word.
Operation
DEST
<
CR0[15:0]; (* Machine status word *);
Flags Affected
None.
Protected Mode Exceptions
#GP(0)
If the destination is located in a nonwritable segment.
If a memory operand effective address is outside the CS, DS, ES, FS, or
GS segment limit.
If the DS, ES, FS, or GS register is used to access memory and it contains
a null segment selector.
#SS(0)
If a memory operand effective address is outside the SS segment limit.
#PF(fault-code)If a page fault occurs.
#AC(0)
If alignment checking is enabled and an unaligned memory reference is
made while the current privilege level is 3.
Opcode
Instruction
Description
0F 01 /4
SMSW r/m16
Store machine status word to r/m16
0F 01 /4
SMSW r32/m16
Store machine status word in low-order 16 bits of r32/m16;
high-order 16 bits of r32 are undefined
