3-712
INSTRUCTION SET REFERENCE
XADD—Exchange and Add
Description
This instruction exchanges the first operand (destination operand) with the second operand
(source operand), then loads the sum of the two values into the destination operand. The desti-
nation operand can be a register or a memory location; the source operand is a register.
This instruction can be used with a LOCK prefix.
Intel Architecture Compatibility
Intel Architecture processors earlier than the Intel486™ processor do not recognize this instruc-
tion. If this instruction is used, you should provide an equivalent code sequence that runs on
earlier processors.
Operation
TEMP
<
SRC + DEST
SRC
<
DEST
DEST
<
TEMP
Flags Affected
The CF, PF, AF, SF, ZF, and OF flags are set according to the result of the addition, which is
stored in the destination operand.
Protected Mode Exceptions
#GP(0)
If the destination is located in a nonwritable segment.
If a memory operand effective address is outside the CS, DS, ES, FS, or
GS segment limit.
If the DS, ES, FS, or GS register contains a null segment selector.
#SS(0)
If a memory operand effective address is outside the SS segment limit.
#PF(fault-code)If a page fault occurs.
#AC(0)
If alignment checking is enabled and an unaligned memory reference is
made while the current privilege level is 3.
Opcode
Instruction
Description
0F C0/r
XADD r/m8,r8
Exchange r8 and r/m8; load sum into r/m8.
0F C1/r
XADD r/m16,r16
Exchange r16 and r/m16; load sum into r/m16.
0F C1/r
XADD r/m32,r32
Exchange r32 and r/m32; load sum into r/m32.
