A-1
APPENDIX A
OPCODE MAP
The opcode tables in this chapter are provided to aid in interpreting Intel Architecture object
code. The instructions are divided into three encoding groups: 1-byte opcode encodings, 2-byte
opcode encodings, and escape (floating-point) encodings. The 1- and 2-byte opcode encodings
are used to encode integer, system, MMX technology, and Streaming SIMD Extensions. The
opcode maps for these instructions are given in Table A-2 through A-6. Section A.2.1., One-
Byte Opcode Instructions through Section A.2.5., Opcode Extensions For One- And Two-byte
Opcodes give instructions for interpreting 1- and 2-byte opcode maps. The escape encodings
are used to encode floating-point instructions. The opcode maps for these instructions are given
in Table A-7 through A-22. Section A.2.6., Escape Opcode Instructions gives instructions for
interpreting the escape opcode maps.
The opcode tables in this section aid in interpreting Pentium
®
processor object code. Use the
four high-order bits of the opcode as an index to a row of the opcode table; use the four low-
order bits as an index to a column of the table. If the opcode is 0FH, refer to the 2-byte opcode
table and use the second byte of the opcode to index the rows and columns of that table.
The escape (ESC) opcode tables for floating-point instructions identify the eight high-order bits
of the opcode at the top of each page. If the accompanying ModR/M byte is in the range 00H
through BFH, bits 3 through 5 identified along the top row of the third table on each page, along
with the REG bits of the ModR/M, determine the opcode. ModR/M bytes outside the range 00H
through BFH are mapped by the bottom two tables on each page.
Refer to Chapter 2, Instruction Format for detailed information on the ModR/M byte, register
values, and the various addressing forms.
A.1.KEY TO ABBREVIATIONS
Operands are identified by a two-character code of the form Zz. The first character, an uppercase
letter, specifies the addressing method; the second character, a lowercase letter, specifies the
type of operand.
A.1.1.Codes for Addressing Method
The following abbreviations are used for addressing methods:
ADirect address. The instruction has no ModR/M byte; the address of the operand is en-
coded in the instruction; and no base register, index register, or scaling factor can be
applied (for example, far JMP (EA)).
CThe reg field of the ModR/M byte selects a control register (for example,
MOV (0F20, 0F22)).
