B-25
INSTRUCTION FORMATS AND ENCODINGS
Table B-15. Streaming SIMD Extensions Instruction Behavior with Prefixes
Table B-16. SIMD Integer Instructions - Behavior with Prefixes
Table B-17. Cacheability Control Instruction Behavior with Prefixes
Prefix Type
Effect on Streaming SIMD Extensions
Address Size Prefix (67H)
Affects Streaming SIMD Extensions with memory operand
Ignored by Streaming SIMD Extensions without memory operand.
Operand Size (66H)
Not supported and may result in undefined behavior.
Segment Override
(2EH,36H,3EH,26H,64H,65H)
Affects Streaming SIMD Extensions with mem.operand
Ignored by Streaming SIMD Extensions without mem operand
Repeat Prefix (F3H)
Affects Streaming SIMD Extensions
Repeat NE Prefix(F2H)
Not supported and may result in undefined behavior.
Lock Prefix (0F0H)
Generates invalid opcode exception.
Prefix Type
Effect on MMX Instructions
Address Size Prefix (67H)
Affects MMX instructions with mem. operand
Ignored by MMX instructions without mem. operand.
Operand Size (66H)
Reserved and may result in unpredictable behavior.
Segment Override
(2EH,36H,3EH,26H,64H,65H)
Affects MMX instructions with mem. operand
Ignored by MMX instructions without mem operand
Repeat Prefix (F3H)
Reserved and may result in unpredictable behavior.
Repeat NE Prefix(F2H)
Reserved and may result in unpredictable behavior.
Lock Prefix (0F0H)
Generates invalid opcode exception.
Prefix Type
Effect on Streaming SIMD Extensions
Address Size Prefix (67H)
Affects cacheability control instruction with a mem. operand
Ignored by cacheability control instruction w/o a mem. operand.
Operand Size (66H)
Ignored by PREFETCH and SFENCE. Not supported and may
result in undefined behavior with MOVNTPS. Ignored by
MOVNTQ and MASKMOVQ.
Segment Override
(2EH,36H,3EH,26H,64H,65H)
Affects cacheability control instructions with mem. operand
Ignored by cacheability control instruction without mem operand
Repeat Prefix(F3H)
Ignored by PREFETCH and SFENCE instructions.
Not supported and may result in undefined behavior with
MOVNTPS. Ignored by MOVNTQ and MASKMOVQ.
Repeat NE Prefix(F2H)
Ignored by PREFETCH and SFENCE instructions.
Not supported and may result in undefined behavior with
MOVNTPS. Ignored by MOVNTQ and MASKMOVQ.
Lock Prefix (0F0H)
Generates an invalid opcode exception for all cacheability
instructions.
