<<< Fetch Operands Phase | Index | Execute phase >>> |
Place the address of the location to be read on the address bus via MAR.
Activate the memory read control signal on the control bus.
Wait for the memory to retrieve the data from the addressed memory location.
Read the data from the data bus into MDR.
Drop the memory read control signal to terminate the read cycle.
A simple Pentium memory read cycle takes 3 clocks:
Steps 1-2 and then 4-5 are done in one clock cycle each.
For slower memories, wait cycles will have to be inserted.
<<< Fetch Operands Phase | Index | Execute phase >>> |