CIS-77 Home http://www.c-jump.com/CIS77/CIS77syllabus.htm

The Instruction Cycle

  1. The Instruction Cycle
  2. Fetch Instruction Phase
  3. Decode Instruction Phase
  4. Evaluate Operand Address Phase
  5. Fetch Operands Phase
  6. Steps in a Typical Read Cycle
  7. Execute phase
  8. Store Result Phase
  9. Steps in a Typical Write Cycle
  10. Properties of Memory
  11. ROM, Read-only Memory
  12. EPROM, Erasable PROMs
  13. RAM, Read/Write Memory
  14. DRAM Types
  15. Instruction Examples
  16. Changing the Sequence of Execution
  17. JMP Instruction Example
  18. Instruction Cycle FSM
  19. Micro-instructions and the Microcode
  20. Microcode Details
  21. Turing Machine
  22. Von-Neumann Machine Summary
  23. Von-Neumann Machine Cont.
  24. Von-Neumann Architecture Requirements