21. Encoding ADD Immediate Instruction

1. If opcode high-order bit set to 1, then instruction has an immediate constant.

2. There is no direction bit in the opcode:

   • : indeed, you cannot specify a constant as a destination operand!

   • Therefore, destination operand is always the location encoded in the MOD-R/M bits of the the MOD-REG-R/M byte.

   • In place of the direction bit d, the opcode has a sign extension x bit instead:

     • For 8-bit operands, the CPU ignores x bit.

     • For 16-bit and 32-bit operands, x bit specifies the size of the Constant following at the end of the instruction:

       • If x bit contains zero, the Constant is the same size as the operand (i.e., 16 or 32 bits).

       • If x bit contains one, the Constant is a signed 8-bit value, and the CPU sign-extends this value to the appropriate size before adding it to the operand.

     • This little x trick often makes programs shorter, because adding small-value constants to 16 or 32 bit operands is very common.

3. The third difference between the ADD-immediate and the standard ADD instruction is the meaning of the REG field in the MOD-REG-R/M byte:

   • Since the instruction implies that

     • the source operand is a constant, and

     • MOD-R/M fields specify the destination operand,

     the instruction does not need to use the REG field to specify an operand.

   • Instead, the x86 CPU uses these three bits as an opcode extension.

   • For the ADD-immediate instruction the REG bits must contain zero.

   • Other bit patterns would correspond to a different instruction.

• Note that when adding a constant to a memory location, the displacement (if any) immediately precedes the immediate (constant) value in the opcode sequence.