CIS-77 Home http://www.c-jump.com/CIS77/CIS77syllabus.htm

Encoding Real x86 Instructions

  1. Encoding Real x86 Instructions
  2. x86 Instructions Overview
  3. x86 Instruction Format Reference
  4. x86 Opcode Sizes
  5. x86 ADD Instruction Opcode
  6. Encoding x86 Instruction Operands, MOD-REG-R/M Byte
  7. General-Purpose Registers
  8. REG Field of the MOD-REG-R/M Byte
  9. MOD R/M Byte and Addressing Modes
  10. SIB (Scaled Index Byte) Layout
  11. Scaled Indexed Addressing Mode
  12. Encoding ADD Instruction Example
  13. Encoding ADD CL, AL Instruction
  14. Encoding ADD ECX, EAX Instruction
  15. Encoding ADD EDX, DISPLACEMENT Instruction
  16. Encoding ADD EDI, [EBX] Instruction
  17. Encoding ADD EAX, [ ESI + disp8 ] Instruction
  18. Encoding ADD EBX, [ EBP + disp32 ] Instruction
  19. Encoding ADD EBP, [ disp32 + EAX*1 ] Instruction
  20. Encoding ADD ECX, [ EBX + EDI*4 ] Instruction
  21. Encoding ADD Immediate Instruction
  22. Encoding Eight, Sixteen, and Thirty-Two Bit Operands
  23. Encoding Sixteen Bit Operands
  24. x86 Instruction Prefix Bytes
  25. Alternate Encodings for Instructions
  26. x86 Opcode Summary
  27. MOD-REG-R/M Byte Summary
  28. ISA Design Considerations
  29. ISA Design Challenges
  30. Intel Architecture Software Developer's Manual
  31. Intel Instruction Set Reference (Volume2)
  32. Chapter 3 of Intel Instruction Set Reference
  33. Intel Reference Opcode Bytes
  34. Intel Reference Opcode Bytes, Cont.
  35. Intel Reference Opcode Bytes, Cont.
  36. Intel Reference Opcode Bytes, Cont.
  37. Intel Reference Opcode Bytes, Cont.
  38. Intel Reference Opcode Bytes, Cont.
  39. Intel Reference Instruction Column