6-30
INSTRUCTION SET SUMMARY
The SAR instruction shifts the source operand right by from 1 to 31 bit positions (refer to Figure
6-8). This instruction differs from the SHR instruction in that it preserves the sign of the source
operand by clearing empty bit positions if the operand is positive or setting the empty bits if the
operand is negative. Again, the CF flag is loaded with the last bit shifted out of the operand.
The SAR and SHR instructions can also be used to perform division by powers of 2 (refer to
Chapter 3, Instruction Set Reference of the Intel Architecture Software Developers Manual,
Volume 2).
Figure 6-7. SHR Instruction Operation
1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 1 1 1
X
Initial State
CF
0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 1 1
1
After 1-bit SHR Instruction
0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0
0
After 10-bit SHR Instruction
Operand
