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INSTRUCTION SET SUMMARY
6.9.2.1.CONDITIONAL JUMP INSTRUCTIONS
The Jcc (conditional) jump instructions transfer program control to a destination instruction if
the conditions specified with the condition code (cc) associated with the instruction are satisfied
(refer to Table 6-4). If the condition is not satisfied, execution continues with the instruction
following the Jcc instruction. As with the JMP instruction, the transfer is one-way; that is, a
return address is not saved.
The destination operand specifies a relative address (a signed offset with respect to the address
in the EIP register) that points to an instruction in the current code segment. The Jcc instructions
do not support far transfers; however, far transfers can be accomplished with a combination of
a Jcc and a JMP instruction (refer to JccJump if Condition Is Met in Chapter 3, Instruction
Set Reference of the Intel Architecture Software Developers Manual, Volume 2).
Table 6-4. Conditional Jump Instructions
Instruction Mnemonic
Condition (Flag States)
Description
Unsigned Conditional Jumps
JA/JNBE
(CF or ZF)=0
Above/not below or equal
JAE/JNB
CF=0
Above or equal/not below
JB/JNAE
CF=1
Below/not above or equal
JBE/JNA
(CF or ZF)=1
Below or equal/not above
JC
CF=1
Carry
JE/JZ
ZF=1
Equal/zero
JNC
CF=0
Not carry
JNE/JNZ
ZF=0
Not equal/not zero
JNP/JPO
PF=0
Not parity/parity odd
JP/JPE
PF=1
Parity/parity even
JCXZ
CX=0
Register CX is zero
JECXZ
ECX=0
Register ECX is zero
Signed Conditional Jumps
JG/JNLE
((SF xor OF) or ZF) =0
Greater/not less or equal
JGE/JNL
(SF xor OF)=0
Greater or equal/not less
JL/JNGE
(SF xor OF)=1
Less/not greater or equal
JLE/JNG
((SF xor OF) or ZF)=1
Less or equal/not greater
JNO
OF=0
Not overflow
JNS
SF=0
Not sign (non-negative)
JO
OF=1
Overflow
JS
SF=1
Sign (negative)