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INSTRUCTION SET SUMMARY
6.13.EFLAGS INSTRUCTIONS
The EFLAGS instructions allow the state of selected flags in the EFLAGS register to be read or
modified.
6.13.1.Carry and Direction Flag Instructions
The STC (set carry flag), CLC (clear carry flag), and CMC (complement carry flag) instructions
allow the CF flags in the EFLAGS register to be modified directly. They are typically used to
initialize the CF flag to a known state before an instruction that uses the flag in an operation is
executed. They are also used in conjunction with the rotate-with-carry instructions (RCL and
RCR).
The STD (set direction flag) and CLD (clear direction flag) instructions allow the DF flag in the
EFLAGS register to be modified directly. The DF flag determines the direction in which index
registers ESI and EDI are stepped when executing string processing instructions. If the DF flag
is clear, the index registers are incremented after each iteration of a string instruction; if the DF
flag is set, the registers are decremented.
6.13.2.Interrupt Flag Instructions
The STI (set interrupt flag) and CTI (clear interrupt flag) instructions allow the interrupt IF flag
in the EFLAGS register to be modified directly. The IF flag controls the servicing of hardware-
generated interrupts (those received at the processors INTR pin). If the IF flag is set, the
processor services hardware interrupts; if the IF flag is clear, hardware interrupts are masked.
6.13.3.EFLAGS Transfer Instructions
The EFLAGS transfer instructions allow groups of flags in the EFLAGS register to be copied
to a register or memory or be loaded from a register or memory.
The LAHF (load AH from flags) and SAHF (store AH into flags) instructions operate on five of
the EFLAGS status flags (SF, ZF, AF, PF, and CF). The LAHF instruction copies the status flags
to bits 7, 6, 4, 2, and 0 of the AH register, respectively. The contents of the remaining bits in the
register (bits 5, 3, and 1) are undefined, and the contents of the EFLAGS register remain
unchanged. The SAHF instruction copies bits 7, 6, 4, 2, and 0 from the AH register into the SF,
ZF, AF, PF, and CF flags, respectively in the EFLAGS register.
The PUSHF (push flags), PUSHFD (push flags double), POPF (pop flags), and POPFD (pop
flags double) instructions copy the flags in the EFLAGS register to and from the stack. The
PUSHF instruction pushes the lower word of the EFLAGS register onto the stack (refer to
Figure 6-11). The PUSHFD instruction pushes the entire EFLAGS register onto the stack (with
the RF and VM flags read as clear).