7-30
FLOATING-POINT UNIT
The packed decimal indefinite encoding is stored by the FBSTP instruction in response to a
masked floating-point invalid operation exception. Attempting to load this value with the FBLD
instruction produces an undefined result.
7.4.4.Unsupported Extended-Real Encodings
The extended-real format permits many encodings that do not fall into any of the categories
shown in Table 7-9. Table 7-12 shows these unsupported encodings. Some of these encodings
were supported by the Intel 287 math coprocessor; however, most of them are not supported by
the Intel 387 math coprocessor, or the internal FPUs in the Intel486, Pentium
®
, or Pentium
®
Pro processors. These encodings are no longer supported due to changes made in the final
version of IEEE Standard 754 that eliminated these encodings.
The categories of encodings formerly known as pseudo-NaNs, pseudo-infinities, and un-normal
numbers are not supported. The Intel 387 math coprocessor and the internal FPUs in the
Intel486, Pentium
®
, and Pentium
®
Pro processors generate the invalid operation exception
when they are encountered as operands.
The encodings formerly known as pseudo-denormal numbers are not generated by the Intel 387
math coprocessor and the internal FPUs in the Intel486, Pentium
®
, and Pentium
®
Pro proces-
sors; however, they are used correctly when encountered as operands. The exponent is treated
as if it were 00..01B and the mantissa is unchanged. The denormal exception is generated.
