7-42
FLOATING-POINT UNIT
The FLDCW instructions loads the FPU control word register with a value from memory. The
FSTCW/FNSTCW and FSTSW/FNSTSW instructions store the FPU control and status words,
respectively, in memory (or for an FSTSW/FNSTSW instruction in a general-purpose register).
The FSTENV/FNSTENV and FSAVE/FNSAVE instructions save the FPU environment and
state, respectively, in memory. The FPU environment includes all the FPUs control and status
registers; the FPU state includes the FPU environment and the data registers in the FPU register
stack. (The FSAVE/FNSAVE instruction also initializes the FPU to default values, like the
FINIT/FNINIT instruction, after it saves the original state of the FPU.)
The FLDENV and FRSTOR instructions load the FPU environment and state, respectively,
from memory into the FPU. These instructions are commonly used when switching tasks or
contexts.
The WAIT/FWAIT instructions are synchronization instructions. (They are actually mnemonics
for the same opcode.) These instructions check the FPU status word for pending unmasked FPU
exceptions. If any pending unmasked FPU exceptions are found, they are handled before the
processor resumes execution of the instructions (integer, floating-point, or system instruction)
in the instruction stream. The WAIT/FWAIT instructions are provided to allow synchronization
of instruction execution between the FPU and the processors integer unit. Refer to Section 7.9.,
Floating-Point Exception Synchronization for more information on the use of the
WAIT/FWAIT instructions.
7.5.12.Waiting Vs. Non-waiting Instructions
All of the floating-point instructions except a few special control instructions perform a wait
operation (similar to the WAIT/FWAIT instructions), to check for and handle pending unmasked
FPU exceptions, before they perform their primary operation (such as adding two real numbers).
These instructions are called waiting instructions. Some of the FPU control instructions, such
as FSTSW/FNSTSW, have both a waiting and a non-waiting versions. The waiting version (with
the F prefix) executes a wait operation before it performs its primary operation; whereas, the
non-waiting version (with the FN prefix) ignores pending unmasked exceptions. Non-waiting
instructions allow software to save the current FPU state without first handling pending excep-
tions or to reset or reinitialize the FPU without regard for pending exceptions.
NOTE
When operating a Pentium
®
or Intel486 processor in MS-DOS compati-
bility mode, it is possible (under unusual circumstances) for a non-waiting
instruction to be interrupted prior to being executed to handle a pending FPU
exception. The circumstances where this can happen and the resulting action
of the processor are described in Section E.2.1.3., No-Wait FPU Instructions
Can Get FPU Interrupt in Window in Appendix E, Guidelines for Writing
FPU Exceptions Handlers. When operating a Pentium
®
Pro processor in MS-
DOS compatibility mode, non-waiting instructions can not be interrupted in
this way (refer to Section E.2.2., MS-DOS* Compatibility Mode in the P6
Family Processors in Appendix E, Guidelines for Writing FPU Exceptions
Handlers).
