9-15
PROGRAMMING WITH THE STREAMING SIMD EXTENSIONS
The PSHUFW (Shuffle packed integer word in MMX register) instruction performs a full
shuffle of any source word field to any result word field, using an 8-bit immediate operand.
9.3.7.Shuffle Instructions
The SHUFPS (Shuffle packed, single-precision, floating-point) instruction is able to shuffle any
of the packed four single-precision, floating-point numbers from one source operand to the
lower two destination fields; the upper two destination fields are generated from a shuffle of any
of the four SP FP numbers from the second source operand (Figure 9-7). By using the same
register for both sources, SHUFPS can return any combination of the four SP FP numbers from
this register.
The UNPCKHPS (Unpacked high packed, single-precision, floating-point) instruction performs
an interleaved unpack of the high-order data elements of first and second packed, single-preci-
sion, floating-point operands. It ignores the lower half part of the sources (Figure 9-8). When
unpacking from a memory operand, the full 128-bit operand is accessed from memory, but only
the high order 64 bits are utilized by the instruction.
Figure 9-7. Packed Shuffle Operation
X4
X3
X2
X1
Y4
Y3
Y2
Y1
{Y4 ... Y1}{Y4 ... Y1}{X4 ... X1}{X4 ... X1}
