11-2
PROCESSOR IDENTIFICATION AND FEATURE DETERMINATION
11.1.PROCESSOR IDENTIFICATION
The CPUID instruction returns the processor type for the processor that executes the instruction.
It also indicates the features that are present in the processor, including the existence of an
on-chip FPU. The following information can be obtained with this instruction:
The highest operand value the instruction responds to (2 for the Pentium
®
Pro processors
and 1 for the Pentium
®
processors and recent Intel486 processors).
The processors family identification (ID) number, model ID, and stepping ID.
The presence of an on-chip FPU.
Support for or the presence of the following architectural extensions and enhancements:
Virtual-8086 mode enhancements.
Debugging extensions.
Page-size extensions.
Read time stamp counter (RDTSC) instruction.
Read model specific registers (RDMSR) and write model specific registers (WRMSR)
instructions.
Physical address extension.
Machine check exceptions.
Compare and exchange 8 bytes instruction (CMPXCHG8B).
On-chip, advanced programmable interrupt controller (APIC).
Memory-type range registers (MTRRs).
Page global flag.
Machine check architecture.
Conditional move instruction (CMOVcc).
MMX technology.
Cache and TLB information.
To use this instruction, a source operand value of 0, 1, or 2 is placed in the EAX register.
Processor identification and feature information is then returned in the EAX, EBX, ECX, and
EDX registers. Refer to Section 3.2., Instruction Reference in Chapter 3, Instruction Set
Reference of the Intel Architecture Software Developers Manual, Volume 2, for more detailed
information about the instruction.
