F-4
GUIDELINES FOR WRITING SIMD FLOATING-POINT EXCEPTION
F.4.SIMD FLOATING-POINT EXCEPTIONS AND THE IEEE-754
STANDARD FOR BINARY FLOATING-POINT
COMPUTATIONS
The Streaming SIMD Extensions are 100% compatible with the ANSI/IEEE Standard 754-
1985, IEEE Standard for Binary Floating-Point Arithmetic, satisfying all of its mandatory re-
quirements (when the flush-to-zero mode is not enabled). But a programming environment that
includes the Streaming SIMD Extensions instructions will comply with both the obligatory and
the strongly recommended requirements of the IEEE Standard 754 regarding floating-point ex-
ception handling, only as a combination of hardware and software (which is acceptable). The
standard states that a user should be able to request a trap on any of the five floating-point ex-
ceptions (note that the denormal exception is an IA addition), and it also specifies the values (op-
erands or result) to be delivered to the exception handler.
The main issue is that for Streaming SIMD Extensions instructions that raise post-computation
exceptions (traps: overflow, underflow, or inexact), unlike for IA-32 FPU instructions, the pro-
cessor does not provide the result recommended by the IEEE standard to the user handler. If a
user program needs the result of an instruction that generated a post-computation exception, it
is the responsibility of the software to produce this result by emulating the faulting Streaming
SIMD Extensions instruction. Another issue is that the standard does not specify explicitly how
to handle multiple floating-point exceptions that occur simultaneously. For packed operations,
a logical OR of the flags that would be set by each sub-operation is used to set the exception
flags in the MXCSR. The following subsections present one possible way to solve these prob-
lems.
F.4.1.Floating-Point Emulation
Every operating system must provide a kernel level floating-point exception handler (a template
was presented in Section F.2., Software Exception Handling above). In the following, assume
that a user mode floating-point exception filter is supplied for Streaming SIMD Extensions ex-
ceptions (for example as part of a library of C functions), that a user program can invoke in order
to handle unmasked exceptions. The user mode floating-point exception filter (not shown here)
has to be able to emulate the subset of Streaming SIMD Extensions instructions that can gener-
ate numeric exceptions, and has to be able to invoke a user provided floating-point exception
handler for floating-point exceptions. When a floating-point exception that is not masked is
raised by a Streaming SIMD Extensions instruction, the low-level floating-point exception han-
dler will be called. This low-level handler may in turn call the user mode floating-point excep-
tion filter. The filter function receives the original operands of the excepting instruction, as no
results are provided by the hardware, whether a pre-computation or a post-computation excep-
tion has occurred. The filter will unpack the operands into up to four sets of sub-operands, and
will submit them one set at a time to an emulation function (that will be presented in Example
F-2 in Section F.4.3., SIMD Floating-Point Emulation Implementation Example, below). The
emulation function will examine the sub-operands, and will possibly redo the necessary calcu-
lation.
