3-87
INSTRUCTION SET REFERENCE
CMPS/CMPSB/CMPSW/CMPSDCompare String Operands
Description
This instruction compares the byte, word, or double word specified with the first source operand
with the byte, word, or double word specified with the second source operand and sets the status
flags in the EFLAGS register according to the results. Both the source operands are located in
memory. The address of the first source operand is read from either the DS:ESI or the DS:SI
registers (depending on the address-size attribute of the instruction, 32 or 16, respectively). The
address of the second source operand is read from either the ES:EDI or the ES:DI registers
(again depending on the address-size attribute of the instruction). The DS segment may be over-
ridden with a segment override prefix, but the ES segment cannot be overridden.
At the assembly-code level, two forms of this instruction are allowed: the explicit-operands
form and the no-operands form. The explicit-operands form (specified with the CMPS
mnemonic) allows the two source operands to be specified explicitly. Here, the source operands
should be symbols that indicate the size and location of the source values. This explicit-operands
form is provided to allow documentation; however, note that the documentation provided by this
form can be misleading. That is, the source operand symbols must specify the correct type (size)
of the operands (bytes, words, or doublewords), but they do not have to specify the correct loca-
tion. The locations of the source operands are always specified by the DS:(E)SI and ES:(E)DI
registers, which must be loaded correctly before the compare string instruction is executed.
The no-operands form provides short forms of the byte, word, and doubleword versions of the
CMPS instructions. Here also the DS:(E)SI and ES:(E)DI registers are assumed by the processor
to specify the location of the source operands. The size of the source operands is selected with
the mnemonic: CMPSB (byte comparison), CMPSW (word comparison), or CMPSD (double-
word comparison).
Opcode
Instruction
Description
A6
CMPS m8, m8
Compares byte at address DS:(E)SI with byte at address
ES:(E)DI and sets the status flags accordingly
A7
CMPS m16, m16Compares word at address DS:(E)SI with word at address
ES:(E)DI and sets the status flags accordingly
A7
CMPS m32, m32Compares doubleword at address DS:(E)SI with doubleword
at address ES:(E)DI and sets the status flags accordingly
A6
CMPSB
Compares byte at address DS:(E)SI with byte at address
ES:(E)DI and sets the status flags accordingly
A7
CMPSW
Compares word at address DS:(E)SI with word at address
ES:(E)DI and sets the status flags accordingly
A7
CMPSD
Compares doubleword at address DS:(E)SI with doubleword
at address ES:(E)DI and sets the status flags accordingly
