3-99
INSTRUCTION SET REFERENCE
CMPSS—Scalar Single-FP Compare (Continued)
Virtual 8086 Mode Exceptions
Same exceptions as in Real Address Mode.
#AC
For unaligned memory reference if the current privilege level is 3.
#PF (fault-code) For a page fault.
Comments
Compilers and assemblers should implement the following 2-operand pseudo-ops in addition to
the 3-operand CMPSS instruction.
The greater-than relations not implemented in hardware require more than one instruction to
emulate in software and therefore should not be implemented as pseudo-ops. (For these, the
programmer should reverse the operands of the corresponding less than relations and use move
instructions to ensure that the mask is moved to the correct destination register and that the
source operand is left intact.)
Bits 7-4 of the immediate field are reserved. Different processors may handle them differently.
Usage of these bits risks incompatibility with future processors.
Pseudo-Op
Implementation
CMPEQSS xmm1, xmm2
CMPSS xmm1,xmm2, 0
CMPLTSS xmm1, xmm2
CMPSS xmm1,xmm2, 1
CMPLESS xmm1, xmm2
CMPSS xmm1,xmm2, 2
CMPUNORDSS xmm1, xmm2CMPSS xmm1,xmm2, 3
CMPNEQSS xmm1, xmm2CMPSS xmm1,xmm2, 4
CMPNLTSS xmm1, xmm2
CMPSS xmm1,xmm2, 5
CMPNLESS xmm1, xmm2
CMPSS xmm1,xmm2, 6
CMPORDSS xmm1, xmm2CMPSS xmm1,xmm2, 7
