3-100
INSTRUCTION SET REFERENCE
CMPXCHGCompare and Exchange
Description
This instruction compares the value in the AL, AX, or EAX register (depending on the size of
the operand) with the first operand (destination operand). If the two values are equal, the second
operand (source operand) is loaded into the destination operand. Otherwise, the destination
operand is loaded into the AL, AX, or EAX register.
This instruction can be used with a LOCK prefix to allow the instruction to be executed atomi-
cally. To simplify the interface to the processors bus, the destination operand receives a write
cycle without regard to the result of the comparison. The destination operand is written back if
the comparison fails; otherwise, the source operand is written into the destination. (The
processor never produces a locked read without also producing a locked write.)
Intel Architecture Compatibility
This instruction is not supported on Intel processors earlier than the Intel486 processors.
Operation
(* accumulator = AL, AX, or EAX, depending on whether *)
(* a byte, word, or doubleword comparison is being performed*)
IF accumulator = DEST
THEN
ZF
<
1
DEST
<
SRC
ELSE
ZF
<
0
accumulator
<
DEST
FI;
Flags Affected
The ZF flag is set if the values in the destination operand and register AL, AX, or EAX are equal;
otherwise it is cleared. The CF, PF, AF, SF, and OF flags are set according to the results of the
comparison operation.
Opcode
Instruction
Description
0F B0/r
CMPXCHG r/m8,r8Compare AL with r/m8. If equal, ZF is set and r8 is loaded
into r/m8. Else, clear ZF and load r/m8 into AL.
0F B1/r
CMPXCHG r/m16,r16Compare AX with r/m16. If equal, ZF is set and r16 is
loaded into r/m16. Else, clear ZF and load r/m16 into AL
0F B1/r
CMPXCHG r/m32,r32Compare EAX with r/m32. If equal, ZF is set and r32 is
loaded into r/m32. Else, clear ZF and load r/m32 into AL
