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INSTRUCTION SET REFERENCE
FXSAVEStore FP and MMX
State And Streaming SIMD
Extension State (Continued)
Three fields in the floating-point save area contain reserved bits that are not indicated in the
table:
FOP:
The lower 11-bits contain the opcode, upper 5-bits are reserved.
IP & DP:
32-bit mode: 32-bit IP-offset.
16-bit mode: lower 16 bits are IP-offset and upper 16 bits are reserved.
The FXSAVE instruction is used when an operating system needs to perform a context switch
or when an exception handler needs to use the floating-point, MMX technology, and
Streaming SIMD Extension units. It cannot be used by an application program to pass a "clean"
FP state to a procedure, since it retains the current state. An application must explicitly execute
an FINIT instruction after FXSAVE to provide for this functionality.
All of the x87-FP fields retain the same internal format as in FSAVE except for FTW.
Unlike FSAVE, FXSAVE saves only the FTW valid bits rather than the entire x87-FP FTW field.
The FTW bits are saved in a non-TOS relative order, which means that FR0 is always saved first,
followed by FR1, FR2 and so forth. As an example, if TOS=4 and only ST0, ST1 and ST2 are
valid, FSAVE saves the FTW field in the following format:
ST3ST2ST1ST0ST7ST6ST5ST4 (TOS=4)
FR7FR6FR5FR4FR3FR2FR1FR0
11xxxxxx11111111
where xx is one of (00, 01, 10). (11) indicates an empty stack elements, and the 00, 01, and 10
indicate Valid, Zero, and Special, respectively. In this example, FXSAVE would save the
following vector:
FR7FRits6FR5FR4FR3FR2FR1FR0
01110000
