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INSTRUCTION SET REFERENCE
FXSAVEStore FP and MMX
State And Streaming SIMD
Extension State (Continued)
The Streaming SIMD Extension fields in the save image (XMM0-XMM7 and MXCSR) may
not be loaded into the processor if the CR4.OSFXSR bit is not set. This CR4 bit must be set in
order to enable execution of Streaming SIMD Extensions.
The destination m512byte is assumed to be aligned on a 16-byte boundary. If m512byte is not
aligned on a 16-byte boundary, FXSAVE generates a general protection exception.
Operation
m512byte = FP and MMX technology state and Streaming SIMD Extension state;
Exceptions
#AC
If exception detection is disabled, a general protection exception is
signaled if the address is not aligned on 16-byte boundary. Note that if
#AC is enabled (and CPL is 3), signaling of #AC is not guaranteed and
may vary with implementation. In all implementations where #AC is not
signaled, a general protection fault will instead be signaled. In addition,
the width of the alignment check when #AC is enabled may also vary with
implementation; for instance, for a given implementation, #AC might be
signaled for a 2-byte misalignment, whereas #GP might be signaled for all
other misalignments (4-/8-/16-byte). Invalid opcode exception if instruc-
tion is preceded by a LOCK override prefix.
Numeric Exceptions
Invalid, Precision.
Protected Mode Exceptions
#GP(0)
For an illegal memory operand effective address in the CS, DS, ES, FS, or
GS segments.
#SS(0)
For an illegal address in the SS segment.
#PF (fault-code)For a page fault.
#NM
If CR0.EM = 1.
#NM
If TS bit in CR0 is set.
#AC
For unaligned memory reference. To enable #AC exceptions, three condi-
tions must be true(CR0.AM is set; EFLAGS.AC is set; current CPL is 3).
