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INSTRUCTION SET REFERENCE
MOVMove to/from Debug Registers
Description
This instruction moves the contents of a debug register (DR0, DR1, DR2, DR3, DR4, DR5,
DR6, or DR7) to a general-purpose register or vice versa. The operand size for these instructions
is always 32 bits, regardless of the operand-size attribute. Refer to Chapter 15, Debugging and
Performance Monitoring of the Intel Architecture Software Developers Manual, Volume 3, for
a detailed description of the flags and fields in the debug registers.
The instructions must be executed at privilege level 0 or in real-address mode.
When the debug extension (DE) flag in register CR4 is clear, these instructions operate on debug
registers in a manner that is compatible with Intel386 and Intel486 processors. In this mode,
references to DR4 and DR5 refer to DR6 and DR7, respectively. When the DE set in CR4 is set,
attempts to reference DR4 and DR5 result in an undefined opcode (#UD) exception. (The CR4
register was added to the Intel Architecture beginning with the Pentium
®
processor.)
At the opcode level, the reg field within the ModR/M byte specifies which of the debug registers
is loaded or read. The two bits in the mod field are always 11. The r/m field specifies the general-
purpose register loaded or read.
Operation
IF ((DE = 1) and (SRC or DEST = DR4 or DR5))
THEN
#UD;
ELSE
DEST
<
SRC;
Flags Affected
The OF, SF, ZF, AF, PF, and CF flags are undefined.
Protected Mode Exceptions
#GP(0)
If the current privilege level is not 0.
#UD
If the DE (debug extensions) bit of CR4 is set and a MOV instruction is
executed involving DR4 or DR5.
#DB
If any debug register is accessed while the GD flag in debug register DR7
is set.
OpcodeInstruction
Description
0F 21/rMOV r32, DR0-DR7
Move debug register to r32
0F 23 /rMOV DR0-DR7,r32
Move r32 to debug register
