B-15
INSTRUCTION FORMATS AND ENCODINGS
ROL Rotate Left
register by 1
1101 000w : 11 000 reg
memory by 1
1101 000w : mod 000 r/m
register by CL
1101 001w : 11 000 reg
memory by CL
1101 001w : mod 000 r/m
register by immediate count
1100 000w : 11 000 reg : imm8 data
memory by immediate count
1100 000w : mod 000 r/m : imm8 data
ROR Rotate Right
register by 1
1101 000w : 11 001 reg
memory by 1
1101 000w : mod 001 r/m
register by CL
1101 001w : 11 001 reg
memory by CL
1101 001w : mod 001 r/m
register by immediate count
1100 000w : 11 001 reg : imm8 data
memory by immediate count
1100 000w : mod 001 r/m : imm8 data
RSM Resume from System Management Mode0000 1111 : 1010 1010
SAHF Store AH into Flags
1001 1110
SAL Shift Arithmetic Left
same instruction as SHL
SAR Shift Arithmetic Right
register by 1
1101 000w : 11 111 reg
memory by 1
1101 000w : mod 111 r/m
register by CL
1101 001w : 11 111 reg
memory by CL
1101 001w : mod 111 r/m
register by immediate count
1100 000w : 11 111 reg : imm8 data
memory by immediate count
1100 000w : mod 111 r/m : imm8 data
SBB Integer Subtraction with Borrow
register1 to register2
0001 100w : 11 reg1 reg2
register2 to register1
0001 101w : 11 reg1 reg2
memory to register
0001 101w : mod reg r/m
register to memory
0001 100w : mod reg r/m
immediate to register
1000 00sw : 11 011 reg : immediate data
immediate to AL, AX, or EAX
0001 110w : immediate data
immediate to memory
1000 00sw : mod 011 r/m : immediate data
SCAS/SCASB/SCASW/SCASD Scan String1101 111w
Table B-10. Integer Instruction Formats and Encodings (Contd.)
Instruction and Format
Encoding
