B-17
INSTRUCTION FORMATS AND ENCODINGS
SMSW Store Machine Status Word
to register
0000 1111 : 0000 0001 : 11 100 reg
to memory
0000 1111 : 0000 0001 : mod 100 r/m
STC Set Carry Flag
1111 1001
STD Set Direction Flag
1111 1101
STI Set Interrupt Flag
1111 1011
STOS/STOSB/STOSW/STOSD Store String Data1010 101w
STR Store Task Register
to register
0000 1111 : 0000 0000 : 11 001 reg
to memory
0000 1111 : 0000 0000 : mod 001 r/m
SUB Integer Subtraction
register1 to register2
0010 100w : 11 reg1 reg2
register2 to register1
0010 101w : 11 reg1 reg2
memory to register
0010 101w : mod reg r/m
register to memory
0010 100w : mod reg r/m
immediate to register
1000 00sw : 11 101 reg : immediate data
immediate to AL, AX, or EAX
0010 110w : immediate data
immediate to memory
1000 00sw : mod 101 r/m : immediate data
TEST Logical Compare
register1 and register2
1000 010w : 11 reg1 reg2
memory and register
1000 010w : mod reg r/m
immediate and register
1111 011w : 11 000 reg : immediate data
immediate and AL, AX, or EAX
1010 100w : immediate data
immediate and memory
1111 011w : mod 000 r/m : immediate data
UD2 Undefined instruction
0000 FFFF : 0000 1011
VERR Verify a Segment for Reading
register
0000 1111 : 0000 0000 : 11 100 reg
memory
0000 1111 : 0000 0000 : mod 100 r/m
VERW Verify a Segment for Writing
register
0000 1111 : 0000 0000 : 11 101 reg
memory
0000 1111 : 0000 0000 : mod 101 r/m
WAIT Wait
1001 1011
WBINVD Writeback and Invalidate Data Cache0000 1111 : 0000 1001
WRMSR Write to Model-Specific Register0000 1111 : 0011 0000
Table B-10. Integer Instruction Formats and Encodings (Contd.)
Instruction and Format
Encoding
