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ABOUT THIS MANUAL
Chapter 3 Protected-Mode Memory Management. Describes the data structures, registers,
and instructions that support segmentation and paging and explains how they can be used to
implement a flat (unsegmented) memory model or a segmented memory model.
Chapter 4 Protection. Describes the support for page and segment protection provided in
the IA. This chapter also explains the implementation of privilege rules, stack switching, pointer
validation, user and supervisor modes.
Chapter 5 Interrupt and Exception Handling. Describes the basic interrupt mechanisms
defined in the IA, shows how interrupts and exceptions relate to protection, and describes how
the architecture handles each exception type. Reference information for each IA exception is
given at the end of this chapter.
Chapter 6 Task Management. Describes the mechanisms the IA provides to support multi-
tasking and inter-task protection.
Chapter 7 Multiple Processor Management. Describes the instructions and flags that
support multiple processors with shared memory, memory ordering, and the advanced program-
mable interrupt controller (APIC).
Chapter 8 Processor Management and Initialization. Defines the state of an IA processor
and its floating-point and SIMD floating-point units after reset initialization. This chapter also
explains how to set up an IA processor for real-address mode operation and protected-mode
operation, and how to switch between modes.
Chapter 9 Memory Cache Control. Describes the general concept of caching and the
caching mechanisms supported by the IA. This chapter also describes the memory type range
registers (MTRRs) and how they can be used to map memory types of physical memory.
MTRRs were introduced into the IA with the Pentium
®
Pro processor. It also presents informa-
tion on using the new cache control and memory streaming instructions introduced with the
Pentium
®
III processor.
Chapter 10 MMX Technology System Programming. Describes those aspects of the
Intel MMX technology that must be handled and considered at the system programming level,
including task switching, exception handling, and compatibility with existing system environ-
ments. The MMX technology was introduced into the IA with the Pentium
®
processor.
Chapter 11 Streaming SIMD Extensions System Programming. Describes those aspects
of Streaming SIMD Extensions that must be handled and considered at the system programming
level, including task switching, exception handling, and compatibility with existing system
environments. Streaming SIMD Extensions were introduced into the IA with the Pentium
®
processor.
Chapter 12 System Management Mode (SMM). Describes the IAs system management
mode (SMM), which can be used to implement power management functions.
Chapter 13 Machine-Check Architecture. Describes the machine-check architecture,
which was introduced into the IA with the Pentium
®
processor.
Chapter 14 Code Optimization. Discusses general optimization techniques for program-
ming an IA processor.
