6-2
INSTRUCTION SET SUMMARY
6.1.3.New Instructions in the Pentium
®
Pro Processor
The following instructions are new in the Pentium
®
Pro processor:
CMOVccConditional move (refer to Section 6.3.1.2., Conditional Move Instructions).
FCMOVccFloating-point conditional move on condition-code flags in EFLAGS register
(refer to Section 7.5.3., Data Transfer Instructions in Chapter 7, Floating-Point Unit).
FCOMI/FCOMIP/FUCOMI/FUCOMIPFloating-point compare and set condition-code
flags in EFLAGS register (refer to Section 7.5.6., Comparison and Classification Instruc-
tions in Chapter 7, Floating-Point Unit).
RDPMCRead performance monitoring counters (refer to Chapter 3, Instruction Set
Reference of the Intel Architecture Software Developers Manual, Volume 2). (This
instruction is also available in all Pentium
®
processors that implement the MMX
technology.)
UD2Undefined instruction (refer to Section 6.15.4., No-Operation and Undefined
Instructions).
6.1.4.New Instructions in the Pentium
®
Processor
The following instructions are new in the Pentium
®
processor:
CMPXCHG8B (compare and exchange 8 bytes) instruction.
CPUID (CPU identification) instruction. (This instruction was introduced in the Pentium
®
processor and added to later versions of the Intel486 processor.)
RDTSC (read time-stamp counter) instruction.
RDMSR (read model-specific register) instruction.
WRMSR (write model-specific register) instruction.
RSM (resume from SMM) instruction.
The form of the MOV instruction used to access the test registers has been removed on the
Pentium
®
and future IA processors.
