7-22
FLOATING-POINT UNIT
FSTENV/FNSTENV instruction saves the contents of the status, control, tag, FPU instruction
pointer, FPU operand pointer, and opcode registers. The FSAVE/FNSAVE instruction stores that
information plus the contents of the FPU data registers. Note that the FSAVE/FNSAVE instruc-
tion also initializes the FPU to default values (just as the FINIT/FNINIT instruction does) after
it has saved the original state of the FPU.
The manner in which this information is stored in memory depends on the operating mode of
the processor (protected mode or real-address mode) and on the operand-size attribute in effect
(32-bit or 16-bit). Refer to Figures 7-13 through 7-16. In virtual-8086 mode or SMM, the real-
address mode formats shown in Figure 7-16 is used. Refer to Chapter 12, System Management
Mode (SMM) of the Intel Architecture Software Developers Manual, Volume 3, for special
considerations for using the FPU while in SMM.
Figure 7-12. Contents of FPU Opcode Registers
Figure 7-13. Protected Mode FPU State Image in Memory, 32-BitFormat
0
FPU Opcode Register
10
0
2nd Instruction Byte
7
0
1st Instruction Byte
7
2
7
8
0
31
0
4
8
12
16
20
24
32-Bit Protected Mode Format
Control Word
15
Opcode 10...00
Status Word
Tag Word
FPU Instruction Pointer Selector
FPU Operand Pointer Selector
FPU Operand Pointer Offset
0 0 0 0
FPU Instruction Pointer Offset
Reserved
16
