7-59
FLOATING-POINT UNIT
This problem is related to the way the FPU signals the existence of unmasked floating-point
exceptions. (Special exception synchronization is not required for masked floating-point excep-
tions, because the FPU always returns a masked result to the destination operand.)
When a floating-point exception is unmasked and the exception condition occurs, the FPU stops
further execution of the floating-point instruction and signals the exception event. On the next
occurrence of a floating-point instruction or a WAIT/FWAIT instruction in the instruction
stream, the processor checks the ES flag in the FPU status word for pending floating-point
exceptions. It floating-point exceptions are pending, the FPU makes an implicit call (traps) to
the floating-point software exception handler. The exception handler can then execute recovery
procedures for selected or all floating-point exceptions.
Synchronization problems occur in the time frame between when the exception is signaled and
when it is actually handled. Because of concurrent execution, integer or system instructions can
be executed during this time frame. It is thus possible for the source or destination operands for
a floating-point instruction that faulted to be overwritten in memory, making it impossible for
the exception handler to analyze or recover from the exception.
To solve this problem, an exception synchronizing instruction (either a floating-point instruction
or a WAIT/FWAIT instruction) can be placed immediately after any floating-point instruction
that might present a situation where state information pertaining to a floating-point exception
might be lost or corrupted. Floating-point instructions that store data in memory are prime candi-
dates for synchronization. For example, the following three lines of code have the potential for
exception synchronization problems:
FILD COUNT ; Floating-point instruction
INC COUNT ; Integer instruction
FSQRT ; Subsequent floating-point instruction
In this example, the INC instruction modifies the result of a floating-point instruction (FILD).
If an exception is signaled during the execution of the FILD instruction, the result stored in the
COUNT memory location might be overwritten before the exception handler is called.
Rearranging the instructions, as follows, so that the FSQRT instruction follows the FILD
instruction, synchronizes the exception handling and eliminates the possibility of the exception
being handled incorrectly.
FILD COUNT ; Floating-point instruction
FSQRT ; Subsequent floating-point instruction synchronizes
; any exceptions generated by the FILD instruction.
INC COUNT ; Integer instruction
The FSQRT instruction does not require any synchronization, because the results of this instruc-
tion are stored in the FPU data registers and will remain there, undisturbed, until the next
floating-point or WAIT/FWAIT instruction is executed. To absolutely insure that any exceptions
emanating from the FSQRT instruction are handled (for example, prior to a procedure call), a
WAIT instruction can be placed directly after the FSQRT instruction.
Note that some floating-point instructions (non-waiting instructions) do not check for pending
unmasked exceptions (refer to Section 7.5.11., FPU Control Instructions). They include the
FNINIT, FNSTENV, FNSAVE, FNSTSW, FNSTCW, and FNCLEX instructions. When an
