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PROGRAMMING WITH THE STREAMING SIMD EXTENSIONS
9.5.3.2.RECOMMENDATIONS AND GUIDELINES
For more specific information relating to these recommendations and guidelines, such as port
assignments, prefetch instruction details, etc, refer to the Intel Architecture Optimization Refer-
ence Manual (Order Number 245127-001).
Balance the limitations of the architecture.
a.Schedule instructions to resolve dependencies.
b.Intermix SIMD floating-point operations that utilize port 0 and port 1.
c.Do not issue consecutive instructions that utilize the same port.
Use the reciprocal instructions followed by iteration for increased accuracy. These instruc-
tions yield reduced accuracy but execute much faster. If reduced accuracy is acceptable,
use them with no iteration. If near full accuracy is needed, use a Newton-Raphson
iteration. If full accuracy is needed, divide and square root provides this but slows down
performance.
Exceptions
a.Mask exceptions to achieve higher performance. Unmasked exceptions may cause a
reduction in the retirement rate.
b.Utilize the Flush-to-Zero mode for higher performance to avoid the penalty of dealing
with denormals and underflows.
Incorporate the prefetch instruction whenever possible.
Try to emulate conditional moves by masked compares and logicals instead of using
conditional jumps.
Utilize MMX instructions if the computations can be done in SIMD-integer, or for
shuffling data or copying data that is not used later in SIMD floating-point computations.
If the algorithm requires extended precision, conversion to SIMD floating-point code is not
advised, because the SIMD floating-point instructions are single-precision.
9.5.4.Using Streaming SIMD Extensions Code in a Multitasking
Operating System Environment
An application needs to identify the nature of the multitasking operating system on which it
runs. Each task retains its own state that must be saved when a task switch occurs. The processor
state (context) consists of the integer registers, floating-point unit registers, and SIMD floating-
point registers. The STMXCSR and FXSAVE instructions store SIMD floating-point state in
memory for use by exception handlers and other system and application software. The
STMXCSR instruction saves the contents of the SIMD floating-point control/status register. The
FXSAVE instruction saves the x87-FP state (status, control, tag, instruction pointer, data pointer,
opcode and stack registers) and SIMD floating-point state (status/control, tag and data registers).
An application needs to verify that the processor supports FXSAVE prior to using this instruc-
tion. For a processor that implements FXSAVE but not Streaming SIMD Extensions, this can be
