E-10
GUIDELINES FOR WRITING FPU EXCEPTIONS HANDLERS
sponse to INTR itself is blocked if the operating system has cleared the IF bit in EFLAGS. Note
that Streaming SIMD Extensions numeric exceptions will not cause assertion of FERR# (inde-
pendent of the value of CR0.NE). In addition they ignore the assertion /de-assertion of IGNNE#.
However, just as with the Intel486 and Pentium
®
processors, if the IGNNE# input is inactive,
a floating-point exception which occurred in the previous FPU instruction and is unmasked
causes the processor to freeze immediately when encountering the next WAIT or FPU instruc-
tion (except for no-wait instructions). This means that if the FPU exception handler has not al-
ready been invoked due to the earlier exception (and therefore, the handler not has cleared that
exception state from the FPU), the processor is forced to wait for the handler to be invoked and
handle the exception, before the processor can execute another WAIT or FPU instruction.
As explained in Section E.2.1.3., No-Wait FPU Instructions Can Get FPU Interrupt in Win-
dow, if a no-wait instruction is used outside of the FPU exception handler, in the Intel486
and Pentium
®
processors, it may accept an unmasked exception from a previous FPU instruction
which happens to fall within the external interrupt sampling window that is opened near the be-
ginning of execution of all FPU instructions. This will not happen in the P6 family processors,
because this sampling window has been removed from the no-wait group of FPU instructions.
E.3.RECOMMENDED PROTOCOL FOR MS-DOS*
COMPATIBILITY HANDLERS
The activities of numeric programs can be split into two major areas: program control and arith-
metic. The program control part performs activities such as deciding what functions to perform,
calculating addresses of numeric operands, and loop control. The arithmetic part simply adds,
subtracts, multiplies, and performs other operations on the numeric operands. The processor is
designed to handle these two parts separately and efficiently. An FPU exception handler, if a sys-
tem chooses to implement one, is often one of the most complicated parts of the program control
code.
E.3.1.Floating-Point Exceptions and Their Defaults
The FPU can recognize six classes of floating-point exception conditions while executing float-
ing-point instructions:
1.#I Invalid operation
#IS Stack fault
#IA IEEE standard invalid operation
2.#Z Divide-by-zero
3.#D Denormalized operand
4.#O Numeric overflow
5.#U Numeric underflow
6.#P Inexact result (precision)
