E-11
GUIDELINES FOR WRITING FPU EXCEPTIONS HANDLERS
For complete details on these exceptions and their defaults, refer to Section 7.7., Floating-Point
Exception Handling and Section 7.8., Floating-Point Exception Conditions in Chapter 7,
Floating-Point Unit.
E.3.2.Two Options for Handling Numeric Exceptions
Depending on options determined by the software system designer, the processor takes one of
two possible courses of action when a numeric exception occurs:
The FPU can handle selected exceptions itself, producing a default fix-up that is
reasonable in most situations. This allows the numeric program execution to continue
undisturbed. Programs can mask individual exception types to indicate that the FPU should
generate this safe, reasonable result whenever the exception occurs. The default exception
fix-up activity is treated by the FPU as part of the instruction causing the exception; no
external indication of the exception is given (except that the instruction takes longer to
execute when it handles a masked exception.) When masked exceptions are detected, a
flag is set in the numeric status register, but no information is preserved regarding where or
when it was set.
Alternatively, a software exception handler can be invoked to handle the exception. When
a numeric exception is unmasked and the exception occurs, the FPU stops further
execution of the numeric instruction and causes a branch to a software exception handler.
The exception handler can then implement any sort of recovery procedures desired for any
numeric exception detectable by the FPU.
E.3.2.1.AUTOMATIC EXCEPTION HANDLING: USING MASKED
EXCEPTIONS
Each of the six exception conditions described above has a corresponding flag bit in the FPU
status word and a mask bit in the FPU control word. If an exception is masked (the correspond-
ing mask bit in the control word = 1), the processor takes an appropriate default action and con-
tinues with the computation. The processor has a default fix-up activity for every possible
exception condition it may encounter. These masked-exception responses are designed to be
safe and are generally acceptable for most numeric applications.
For example, if the Inexact result (Precision) exception is masked, the system can specify
whether the FPU should handle a result that cannot be represented exactly by one of four modes
of rounding: rounding it normally, chopping it toward zero, always rounding it up, or always
down. If the Underflow exception is masked, the FPU will store a number that is too small to be
represented in normalized form as a denormal (or zero if its smaller than the smallest denor-
mal). Note that when exceptions are masked, the FPU may detect multiple exceptions in a single
instruction, because it continues executing the instruction after performing its masked response.
For example, the FPU could detect a denormalized operand, perform its masked response to this
exception, and then detect an underflow.
As an example of how even severe exceptions can be handled safely and automatically using the
default exception responses, consider a calculation of the parallel resistance of several values
using only the standard formula (refer to Figure E-4). If R1 becomes zero, the circuit resistance
