3-431
INSTRUCTION SET REFERENCE
MOVNTQMove 64 Bits Non Temporal
Description
The linear address corresponds to the address of the least-significant byte of the referenced
memory data. This store instruction minimizes cache pollution.
Operation
m64 = SRC;
C/C++ Compiler Intrinsic Equivalent
void_mm_stream_pi(__m64 * p, __m64 a)
Stores the data in a to the address p without polluting the caches.
Numeric Exceptions
None.
Protected Mode Exceptions
#GP(0)
For an illegal memory operand effective address in the CS, DS, ES, FS, or
GS segments.
#SS(0)
For an illegal address in the SS segment.
#PF (fault-code)For a page fault.
#UD
If CR0.EM = 1.
#NM
If TS bit in CR0 is set.
#MF
If there is a pending FPU exception.
#AC
For unaligned memory reference. To enable #AC exceptions, three condi-
tions must be true (CR0.AM is set; EFLAGS.AC is set; current CPL is 3)
OpcodeInstruction
Description
0F,E7,/rMOVNTQ m64, mmMove 64 bits representing integer operands (8b, 16b, 32b) from
MM register to memory, minimizing pollution within cache
hierarchy.
